6502 opcodes for hackers - Revision history

MSaarna: /* SBX (AXS) */

2025-07-10T22:34:59Z

‎SBX (AXS)

2025-07-10T22:33:56Z

‎SBX (AXS)

2025-07-10T22:33:14Z

‎SBX (AXS)

2025-07-04T19:22:40Z

‎ALR (ASR)

2025-07-04T19:20:11Z

‎ANC

2025-07-04T19:19:50Z

‎ANC

2025-07-04T16:22:58Z

2025-07-04T14:13:35Z

2025-07-04T14:07:51Z

‎Flag Instructions

2025-07-04T14:07:16Z

‎Flag Instructions

@@ Line 1,263: / Line 1,263: @@
 ; Bonus: If you don't need accurate carry, you can use the roll-over to increment
    TXA            ; A and X are now equal, so (A & X) = X.
-   SBX #($ff-$10) ; X=X+$10
+   SBX #($100-$10) ; X=X+$10
 </pre>

@@ Line 1,261: / Line 1,261: @@
    SBX #$10    ; C flag state before this instruction is irrelevant.
-; If you don't need accurate carry, you can roll-over to increment
+; Bonus: If you don't need accurate carry, you can use the roll-over to increment
    TXA            ; A and X are now equal, so (A & X) = X.
    SBX #($ff-$10) ; X=X+$10

@@ Line 1,256: / Line 1,256: @@
    SBC #$10
    TAX
 ; Faster method (4 cycles, 3 bytes):
    TXA         ; A and X are now equal, so (A & X) = X.
    SBX #$10    ; C flag state before this instruction is irrelevant.
 </pre>

@@ Line 1,219: / Line 1,219: @@
 '''Example:''' Shift and influence the carry afterwards, with bonus utility if you need the mask.
 <pre>
    ALR #$0E
 </pre>
 <span id="ARR"></span>
 === ARR ===
 '''Function:''' <code>A = (A & #{imm})</code>, then a complex <code>ROR</code>-like operation.

@@ Line 1,187: / Line 1,187: @@
 '''Function:''' <code>A = A & #{imm}</code>, then <code>C = N</code>
 <br />Performs a standard <code>AND</code> immediate, but also copies the resulting N flag (bit 7 of A) into the C flag. This is an excellent way to perform a mask and a bit test in a single, 2-cycle instruction. It's also handy for forcing carry clear when masking a value less than 128.
 '''Affects Flags:''' N, Z, C

@@ Line 1,186: / Line 1,186: @@
 === ANC ===
 '''Function:''' <code>A = A & #{imm}</code>, then <code>C = N</code>
-<br />Performs a standard <code>AND</code> immediate, but also copies the resulting N flag (bit 7 of A) into the C flag. This is an excellent way to perform a mask and a bit test in a single, 2-cycle instruction.
+<br />Performs a standard <code>AND</code> immediate, but also copies the resulting N flag (bit 7 of A) into the C flag. This is an excellent way to perform a mask and a bit test in a single, 2-cycle instruction. It's also handy for forcing carry clear when masking a value less than 128.
 '''Affects Flags:''' N, Z, C
@@ Line 1,205: / Line 1,204: @@
 <span id="ALR"></span>
 === ALR (ASR) ===
 '''Function:''' <code>A = (A & #{imm}) / 2</code> (AND immediate followed by LSR A)

@@ Line 1,087: / Line 1,087: @@
 | Indirect,X || SAX ($44,X) || $83 || 2 || 6
 |}
 <span id="LAX"></span>
@@ Line 1,210: / Line 1,216: @@
 | Immediate || ALR #$44 || $4B || 2 || 2
 |}
 <span id="ARR"></span>

@@ Line 592: / Line 592: @@
 <span id="CLC"></span><span id="SEC"></span><span id="CLD"></span><span id="SED"></span><span id="CLI"></span><span id="SEI"></span><span id="CLV"></span>
 === Flag Instructions ===
-These single-byte, 2-cycle instructions directly manipulate the processor status flags. It is critical to use <code>CLD</code> on startup, as the power-on state of the D flag is undefined. If non-interrupt code uses decimal mode and interrupt code uses instructions affected by decimal mode, it's critical to use <code>CLD</code> near the start of your interrupt. (NMOS 6502 doesn't clear the decimal mode flag on interrupt, but <code>RTI</code> does restore it.
+These single-byte, 2-cycle instructions directly manipulate the processor status flags. It is critical to use <code>CLD</code> on startup, as the power-on state of the D flag is undefined. If non-interrupt code uses decimal mode and interrupt code uses instructions affected by decimal mode, it's critical to use <code>CLD</code> near the start of your interrupt. (NMOS 6502 doesn't clear the decimal mode flag on interrupt, but <code>RTI</code> does restore it.)
 '''Affects Flags:''' as noted