Difference between revisions of "6502 Instruction Set"

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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| AND #n || 29 || 2 || 2 || AND to A || Immediate
 
| AND #n || 29 || 2 || 2 || AND to A || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
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| ASL || 0A || 2 || 2 || Arithmetic Shift Left || Immediate
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| ASL nn || 0E || 4 || 3 || Arithmetic Shift Left || Absolute
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| ASL n || 06 || 3 || 2 || Arithmetic Shift Left || Zero Page
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| ASL n,X || 16 || 4 || 2 || Arithmetic Shift Left || Zero Page X
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| ASL nn,X || 1E || 4+ || 3 || Arithmetic Shift Left || Absolute X
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| BCC n || 90 || 2+ || 2 || Branch if carry clear (C=0) || Relative
 
| BCC n || 90 || 2+ || 2 || Branch if carry clear (C=0) || Relative
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| BIT nn || 2C || 4 || 3 || AND with A (A unchanged) || Absolute
 
| BIT nn || 2C || 4 || 3 || AND with A (A unchanged) || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| BRK || 00 || 7 || 1 || Break (force interrupt) || None
 
| BRK || 00 || 7 || 1 || Break (force interrupt) || None
 
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| CLC || 18 || 2 || 1 || Clear Carry || None
 
| CLC || 18 || 2 || 1 || Clear Carry || None
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| CMP #n || C9 || 2 || 2 || Compare with A || Immediate
 
| CMP #n || C9 || 2 || 2 || Compare with A || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| CPX #n || E0 || 2 || 2 || Compare with X || Immediate
 
| CPX #n || E0 || 2 || 2 || Compare with X || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| CPY #n || C0 || 2 || 2 || Compare with Y || Immediate
 
| CPY #n || C0 || 2 || 2 || Compare with Y || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| DEC nn || CE || 6 || 3 || Decrement by one || Absolute
 
| DEC nn || CE || 6 || 3 || Decrement by one || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| DEX || CA || 2 || 1 || Decrement X by one || None
 
| DEX || CA || 2 || 1 || Decrement X by one || None
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| EOR #n || 49 || 2 || 2 || XOR to A || Immediate
 
| EOR #n || 49 || 2 || 2 || XOR to A || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| INC nn || EE || 6 || 3 || Increment by one || Absolute
 
| INC nn || EE || 6 || 3 || Increment by one || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| INX || E8 || 2 || 1 || Increment X by one || None
 
| INX || E8 || 2 || 1 || Increment X by one || None
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| JMP nn || 4C || 3 || 3 || Jump to new location || Absolute
 
| JMP nn || 4C || 3 || 3 || Jump to new location || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| JSR nn || 20 || 6 || 3 || Jump to subroutine || Absolute
 
| JSR nn || 20 || 6 || 3 || Jump to subroutine || Absolute
 
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| LDA #n || A9 || 2 || 2 || Load A || Immediate
 
| LDA #n || A9 || 2 || 2 || Load A || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| LDX #n || A2 || 2 || 2 || Load X || Immediate
 
| LDX #n || A2 || 2 || 2 || Load X || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| LDY #n || A0 || 2 || 2 || Load Y || Immediate
 
| LDY #n || A0 || 2 || 2 || Load Y || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| LSR nn || 4E || 6 || 3 || Logical shift right || Absolute
 
| LSR nn || 4E || 6 || 3 || Logical shift right || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| NOP || EA || 2 || 1 || No operation || None
 
| NOP || EA || 2 || 1 || No operation || None
 
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| ORA #n || 09 || 2 || 2 || OR to A || Immediate
 
| ORA #n || 09 || 2 || 2 || OR to A || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| PHA || 48 || 3 || 1 || Push A onto the stack || None
 
| PHA || 48 || 3 || 1 || Push A onto the stack || None
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| ROL nn || 2E || 6 || 3 || Rotate left through carry || Absolute
 
| ROL nn || 2E || 6 || 3 || Rotate left through carry || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| RTI || 40 || 6 || 1 || Return from interrupt || None
 
| RTI || 40 || 6 || 1 || Return from interrupt || None
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| SBC #n || E9 || 2 || 2 || Subtract with borrow from A || Immediate
 
| SBC #n || E9 || 2 || 2 || Subtract with borrow from A || Immediate
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| SEC || 38 || 2 || 1 || Set carry || None
 
| SEC || 38 || 2 || 1 || Set carry || None
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| STA nn || 8D || 4 || 3 || Store A || Absolute
 
| STA nn || 8D || 4 || 3 || Store A || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| STX nn || 8E || 4 || 3 || Store X || Absolute
 
| STX nn || 8E || 4 || 3 || Store X || Absolute
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! Instruction !! Hex !! Cycles !! Bytes !! Description !! Addressing
 
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| TAX || AA || 2 || 1 || Transfer A to X || None
 
| TAX || AA || 2 || 1 || Transfer A to X || None

Latest revision as of 05:10, 4 August 2017

Instruction Hex Cycles Bytes Description Addressing
ADC #n 69 2 2 Add with carry to A Immediate
ADC nn 6D 4 3 Add with carry to A Absolute
ADC n 65 3 2 Add with carry to A Zero Page
ADC (n,X) 61 6 2 Add with carry to A Indirect X
ADC (n),Y 71 5+ 2 Add with carry to A Indirect Y
ADC n,X 75 4 2 Add with carry to A Zero Page X
ADC nn,X 7D 4+ 3 Add with carry to A Absolute X
ADC nn,Y 79 4+ 3 Add with carry to A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
AND #n 29 2 2 AND to A Immediate
AND nn 2D 4 3 AND to A Absolute
AND n 25 3 2 AND to A Zero Page
AND (n,X) 21 6 2 AND to A Indirect X
AND (n),Y 31 5+ 2 AND to A Indirect Y
AND n,X 35 4 2 AND to A Zero Page X
AND nn,X 3D 4+ 3 AND to A Absolute X
AND nn,Y 39 4+ 3 AND to A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
ASL 0A 2 2 Arithmetic Shift Left Immediate
ASL nn 0E 4 3 Arithmetic Shift Left Absolute
ASL n 06 3 2 Arithmetic Shift Left Zero Page
ASL n,X 16 4 2 Arithmetic Shift Left Zero Page X
ASL nn,X 1E 4+ 3 Arithmetic Shift Left Absolute X
 
Instruction Hex Cycles Bytes Description Addressing
BCC n 90 2+ 2 Branch if carry clear (C=0) Relative
BCS n B0 2+ 2 Branch if carry set (C=1) Relative
BEQ n F0 2+ 2 Branch if equal (Z=1) Relative
BNE n D0 2+ 2 Branch if not equal (Z=0) Relative
BMI n 30 2+ 2 Branch if minus (N=1) Relative
BPL n 10 2+ 2 Branch if plus (N=0) Relative
BVC n 50 2+ 2 Branch if overflow clear (V=0) Relative
BVS n 70 2+ 2 Branch if overflow set (V=1) Relative
 
Instruction Hex Cycles Bytes Description Addressing
BIT nn 2C 4 3 AND with A (A unchanged) Absolute
BIT n 24 3 2 AND with A (A unchanged) Absolute
 
Instruction Hex Cycles Bytes Description Addressing
BRK 00 7 1 Break (force interrupt) None
 
Instruction Hex Cycles Bytes Description Addressing
CLC 18 2 1 Clear Carry None
CLD D8 2 1 Clear decimal mode None
CLI 58 2 1 Clear IRQ disable None
CLV B8 2 1 Clear overflow None
 
Instruction Hex Cycles Bytes Description Addressing
CMP #n C9 2 2 Compare with A Immediate
CMP nn CD 4 3 Compare with A Absolute
CMP n C5 3 2 Compare with A Zero Page
CMP (n,X) C1 6 2 Compare with A Indirect X
CMP (n),Y D1 5+ 2 Compare with A Zero Page X
CMP n,X D5 4 2 Compare with A Absolute X
CMP nn,X DD 4+ 3 Compare with A Absolute X
CMP nn,Y D9 4+ 3 Compare with A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
CPX #n E0 2 2 Compare with X Immediate
CPX nn EC 4 3 Compare with X Absolute
CPX n E4 3 2 Compare with X Zero Page
 
Instruction Hex Cycles Bytes Description Addressing
CPY #n C0 2 2 Compare with Y Immediate
CPY nn CC 4 3 Compare with Y Absolute
CPY n C4 3 2 Compare with Y Zero Page
 
Instruction Hex Cycles Bytes Description Addressing
DEC nn CE 6 3 Decrement by one Absolute
DEC n C6 5 2 Decrement by one Zero Page
DEC n,X D6 6 2 Decrement by one Zero Page X
DEC nn,X DE 7 3 Decrement by one Absolute X
 
Instruction Hex Cycles Bytes Description Addressing
DEX CA 2 1 Decrement X by one None
DEY 88 2 1 Decrement Y by one None
 
Instruction Hex Cycles Bytes Description Addressing
EOR #n 49 2 2 XOR to A Immediate
EOR nn 4D 4 3 XOR to A Absolute
EOR n 45 3 2 XOR to A Zero Page
EOR (n,X) 41 6 2 XOR to A Indirect X
EOR (n),Y 51 5+ 2 XOR to A Indirect Y
EOR n,X 55 4 2 XOR to A Zero Page X
 
Instruction Hex Cycles Bytes Description Addressing
INC nn EE 6 3 Increment by one Absolute
INC n E6 5 2 Increment by one Zero Page
INC n,X F6 6 2 Increment by one Zero Page X
INC nn,X FE 7 3 Increment by one Absolute X
 
Instruction Hex Cycles Bytes Description Addressing
INX E8 2 1 Increment X by one None
INY C8 2 1 Increment Y by one None
 
Instruction Hex Cycles Bytes Description Addressing
JMP nn 4C 3 3 Jump to new location Absolute
JMP (nn) 6C 5 3 Jump to new location Indirect
 
Instruction Hex Cycles Bytes Description Addressing
JSR nn 20 6 3 Jump to subroutine Absolute
 
Instruction Hex Cycles Bytes Description Addressing
LDA #n A9 2 2 Load A Immediate
LDA nn AD 4 3 Load A Absolute
LDA n A5 3 2 Load A Zero Page
LDA (n,X) A1 6 2 Load A Indirect X
LDA (n),Y B1 5+ 2 Load A Indirect Y
LDA n,X B5 4 2 Load A Zero Page X
LDA nn,X BD 4+ 3 Load A Absolute X
LDA nn,Y B9 4+ 3 Load A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
LDX #n A2 2 2 Load X Immediate
LDX nn AE 4 3 Load X Absolute
LDX n A6 3 2 Load X Zero Page
LDX nn,Y BE 4+ 3 Load X Absolute Y
LDX n,Y B6 4 2 Load X Zero Page Y
 
Instruction Hex Cycles Bytes Description Addressing
LDY #n A0 2 2 Load Y Immediate
LDY nn AC 4 3 Load Y Absolute
LDY n A4 3 2 Load Y Zero Page
LDY n,X B4 4 2 Load Y Zero Page X
LDY nn,X BC 4+ 3 Load Y Absolute X
 
Instruction Hex Cycles Bytes Description Addressing
LSR nn 4E 6 3 Logical shift right Absolute
LSR n 46 5 2 Logical shift right Zero Page
LSR 4A 2 1 Logical shift right Accumulator
LSR n,X 56 6 2 Logical shift right Zero Page X
LSR nn,X 5E 7 3 Logical shift right Absolute X
 
Instruction Hex Cycles Bytes Description Addressing
NOP EA 2 1 No operation None
 
Instruction Hex Cycles Bytes Description Addressing
ORA #n 09 2 2 OR to A Immediate
ORA nn 0D 4 3 OR to A Absolute
ORA n 05 3 2 OR to A Zero Page
ORA (n,X) 01 6 2 OR to A Indirect X
ORA (n),Y 11 5+ 2 OR to A Indirect Y
ORA n,X 15 4 2 OR to A Zero Page X
ORA nn,X 1D 4+ 3 OR to A Absolute X
ORA nn,Y 19 4+ 3 OR to A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
PHA 48 3 1 Push A onto the stack None
PHP 08 3 1 Push the processor state onto the stack None
PLA 68 4 1 Pull/Pop A from the stack None
PLP 28 4 1 Pull/Pop the processor state from the stack None
 
Instruction Hex Cycles Bytes Description Addressing
ROL nn 2E 6 3 Rotate left through carry Absolute
ROL n 26 5 2 Rotate left through carry Zero Page
ROL 2A 2 1 Rotate left through carry Accumulator
ROL n,X 36 6 2 Rotate left through carry Zero Page X
ROL nn,X 3E 7 3 Rotate left through carry Absolute X
 
Instruction Hex Cycles Bytes Description Addressing
RTI 40 6 1 Return from interrupt None
RTS 60 6 1 Return from subroutine None
 
Instruction Hex Cycles Bytes Description Addressing
SBC #n E9 2 2 Subtract with borrow from A Immediate
SBC nn ED 4 3 Subtract with borrow from A Absolute
SBC n E5 3 2 Subtract with borrow from A Zero Page
SBC (n,X) E1 6 2 Subtract with borrow from A Indirect X
SBC (n),Y F1 5+ 2 Subtract with borrow from A Indirect Y
SBC n,X F5 4 2 Subtract with borrow from A Zero Page X
SBC nn,X FD 4+ 3 Subtract with borrow from A Absolute X
SBC nn,Y F9 4+ 3 Subtract with borrow from A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
SEC 38 2 1 Set carry None
SED F8 2 1 Set decimal mode None
SEI 78 2 1 Set IRQ disable None
 
Instruction Hex Cycles Bytes Description Addressing
STA nn 8D 4 3 Store A Absolute
STA n 85 3 2 Store A Zero Page
STA (n,X) 81 6 2 Store A Indirect X
STA (n),Y 91 6 2 Store A Indirect Y
STA n,X 95 4 2 Store A Zero Page X
STA nn,X 9D 5 3 Store A Absolute X
STA nn,Y 99 5 3 Store A Absolute Y
 
Instruction Hex Cycles Bytes Description Addressing
STX nn 8E 4 3 Store X Absolute
STX n 86 3 2 Store X Zero Page
STX n,Y 96 4 2 Store X Zero Page Y
STY nn 8C 4 3 Store Y Absolute
STY n 84 3 2 Store Y Zero Page
STY n,X 94 4 2 Store Y Zero Page X
 
Instruction Hex Cycles Bytes Description Addressing
TAX AA 2 1 Transfer A to X None
TAY A8 2 1 Transfer A to Y None
TSX BA 2 1 Transfer stack to X None
TXA 8A 2 1 Transfer X to A None
TXS 9A 2 1 Transfer X to stack None
TYA 98 2 1 Transfer Y to A None
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